In high frequency signaling applications, transmission line termination is important for high quality signal transfer. On-chip resistors are located inside a semiconductor chip for impedance matching and used as transmission line terminations for the signal transfer. Impedance mismatching of on-chip resistors has a significant effect on analog and I/O (input/output) circuits that require high precision reference resistors to maintain performance. The accuracy of on-chip resistors is so important that a calibration scheme is needed to provide accurate on-chip resistors. Current calibration schemes include an off-chip high precision resistor, a C4 (Controlled Collapse Chip Connection) connection, and a network of on-chip parallel switchable resistors as well as associated logic to determine the correct number of resistor segments.
In current standard methods of calibrating on-chip resistors, an on-chip resistor is calibrated with reference to an off-chip resistor and then a code is mirrored to all other on-chip resistors. In the C4 method, increasing the number of C4 is required to mitigate the resistor mismatch due to an increase in the across chip variation (ACV) of resistors. In one of the calibration schemes, in order to mitigate the resistor mismatch due to the ACV, the network of parallel switchable resistors on-chip along with logic to match the off-chip resistor must be duplicated at each local site.